Inside an Integrated Circuit
An IC begins as a semiconductor wafer, usually silicon. Many identical circuit patterns are fabricated across the wafer at once. After testing, the wafer is cut into individual pieces called dies or dice, and each good die is packaged.
The substrate
The substrate is a carefully purified semiconductor crystal. Its electrical properties are altered locally by introducing controlled dopants. Those regions form the P-type and N-type material used to build transistors, diodes, resistive regions, and junction isolation.
Photolithography
Layers are patterned using light-sensitive material called photoresist. A mask or projected pattern defines where material will be removed, deposited, implanted, or modified.
The wafer passes through many cycles of:
- Film growth or deposition.
- Photoresist coating.
- Exposure and development.
- Etching or implantation.
- Cleaning and inspection.
Doping
Ion implantation or diffusion introduces donor or acceptor atoms into selected regions. The exact concentrations and depths determine transistor thresholds, junction voltages, resistance, breakdown behavior, and other electrical properties.
Oxide and gate structures
Silicon dioxide played a decisive role in IC development because it can protect silicon surfaces and can form the insulating gate dielectric of MOS devices. Modern processes also use other dielectric materials and extremely complex three-dimensional transistor structures.
Metal interconnection
After transistors are formed, patterned metal layers connect them. Modern ICs may contain many stacked wiring layers separated by dielectric, with vertical connections called vias linking one level to another.
Resistors and capacitors on a chip
Integrated resistors can be made from doped semiconductor, polysilicon, or thin films. Integrated capacitors use overlapping conductive regions separated by dielectric.
Die attach and bond wires
In a traditional package, the silicon die is attached to a lead frame or substrate. Fine gold, copper, or aluminum bond wires connect pads on the die to the package leads. Other packages use flip-chip bumps or direct redistribution layers instead of long bond wires.
Packaging
| Package family | General use |
|---|---|
| DIP | Through-hole prototypes, education, older equipment, socketed logic. |
| SOIC / TSSOP | Common surface-mount logic and interface ICs. |
| QFP | Many leads around four sides; microcontrollers and larger digital devices. |
| QFN / DFN | Compact leadless packages with short electrical paths. |
| BGA | Large pin counts using solder balls under the package. |
| WLCSP / chip-scale | Package nearly the size of the die itself. |
Why packaging matters electrically
Package leads, bond wires, solder balls, and board traces add resistance, inductance, and capacitance. At low speed this may barely matter. At hundreds of megahertz or gigahertz, package and board geometry become part of the circuit.